2015 IEEE High Performance
Extreme Computing Conference
(HPEC ‘15)
Nineteenth Annual HPEC Conference
15 - 17 September 2015
Westin Hotel, Waltham, MA USA
Resilient/Secure/Parallel Computing 2
1:00-2:40 in Eden Vale A1 - A2
Chair: David Cousins / BBN
Atomic-Delayed Execution: A Concurrent Programming Model for Incomplete Graph-based Computations
Pedro C. Diniz, University of Southern California
The sheer size of data sets from application domains such as biomedical and social networks will lead to the need to develop
algorithms that have strict time bounds and can tolerate temporary unavailability of data if they are to produce acceptable results
in feasible time. In this paper we describe a simple, yet powerful, object-based concurrent programming model that features
atomicity, timed execution and tolerance to data unavailability. We describe the underlying concepts and illustrate their use in
specifying meaningful computations on large graphs. This experience does show that it is possible to constrain and augment
existing concurrent programming models to support developers in developing and reasoning incomplete computations we
believe an increasingly important class of algorithms.
Leakage Evaluation on Power Balance Countermeasure Against Side-Channel Attack on FPGAs
Xin Fang, Pei Luo, Yunsi Fei, and Miriam Leeser, Northeastern University
Power leakage through side-channels has been utilized by attackers to recover secret information in embedded cryptographic
systems, and various countermeasures have been devised to mitigate this kind of leakage. In hardware systems, examples of
such countermeasures include power balance circuits and masked gates. Power balance technologies such as Wave Dynamic
Differential Logic (WDDL) aim to balance the power by introducing differential logic. However, the early evaluation effect, which
can take advantage of the possible different arrival times for a pair of differential input signals, hampers the strength of the
power balance countermeasure. In this paper, we provide a new method to further balance the power of differential signals by
manipulating the lower level primitives and applying placement constraints on a Field Programmable Gate Array (FPGA). We
use the Advanced Encryption Standard (AES) encryption algorithm as an example to demonstrate the amount of leakage for
different implementations. Results show that constraining the differential pair in one LUT does not guarantee power leakage
reduction, and placement constraints on state registers are necessary.
Parallel Vectorized Algebraic AES in MATLAB for Rapid Prototyping of Encrypted Sensor Processing Algorithms and
Database Analytics
Jeremy Kepner, Vijay Gadepally, Braden Hancock, Peter Michaleas, Elizabeth Michel, Mayank Varia, MIT Lincoln Laboratory
The increasing use of networked sensor systems and networked databases has led to an increased interest in incorporating
encryption directly into sensor algorithms and database analytics. MATLAB is the dominant tool for rapid prototyping of sensor
algorithms and has extensive database analytics capabilities. The advent of high level and high performance Galois Field
mathematical environments allows encryption algorithms to be expressed succinctly and efficiently. This work leverages the
Galois Field primitives found the MATLAB Communication Toolbox to implement a mode of the Advanced Encrypted Standard
(AES) based on first principals mathematics. The resulting implementation requires 100x less code than standard AES
implementations and delivers speed that is effective for many design purposes. The parallel version achieves speed comparable
to native OpenSSL on a single node and is sufficient for real-time prototyping of many sensor processing algorithms and
database analytics.
Big Data Strategies for Data Center Infrastructure Management Using a 3D Gaming Platform
Matthew Hubbell, Andrew Moran, William Arcand, David Bestor, Bill Bergeron, Chansup Byun, Vijay Gadepally, Peter Michaleas, Julie Mullen,
Andrew Prout, Albert Reuther, Antonio Rosa, Charles Yee, Jeremy Kepner, MIT Lincoln Laboratory
High Performance Computing (HPC) is intrinsically linked to effective Data Center Infrastructure Management (DCIM). Cloud
services and HPC have become key components in Department of Defense and corporate Information Technology competitive
strategies in the global and commercial spaces. As a result, the reliance on consistent, reliable Data Center space is more
critical than ever. The costs and complexity of providing quality DCIM are constantly being tested and evaluated by the United
States Government and companies such as Google, Microsoft and Facebook. This paper will demonstrate a system where Big
Data strategies and 3D gaming technology is leveraged to successfully monitor and analyze multiple HPC systems and a lights-
out modular HP EcoPOD 240a Data Center on a singular platform. Big Data technology and a 3D gaming platform enables the
relative real time monitoring of 5000 environmental sensors, more than 3500 IT data points and display visual analytics of the
overall operating condition of the Data Center from a command center over 100 miles away. In addition, the Big Data model
allows for in depth analysis of historical trends and conditions to optimize operations achieving even greater efficiencies and
reliability.
Thursday, September 17